1. Field of the Invention
The invention relates to a forming method of a stacking structure comprising lower wirings and an insulative layer of an electron source having matrix wirings in which upper and lower wirings cross each other through the insulative layer and, more particularly, to a manufacturing method of the electron source and an image display apparatus to which such a forming method is applied.
2. Related Background Art
In a flat image display apparatus using electron-emitting devices, it is necessary that wirings for supplying currents to the electron-emitting devices are formed at high precision because of the realization of finer patterning. It is also required to reduce a resistance of the wirings because of the realization of a large display screen. Therefore, a method of forming wirings having a larger film thickness onto a substrate more finely and at high precision is required.
A method of using a photosensitive paste can be mentioned as a method of forming such wirings having the large-film thickness at the high precision. According to such a method, the photosensitive paste comprising a photosensitive resin component, electroconductive fine particles, glass fine particles, and the like is formed as a film onto the substrate, exposed and developed, and an electroconductive layer precursor having a desired pattern is formed, thereafter, by baking the precursor, the resin component is decomposed and removed and an electroconductive layer is formed. Such a method can be also applied to the case of forming an insulative layer by removing the electroconductive fine particles from the photosensitive paste and executing manufacturing steps similar to those mentioned above.
However, in the case where the wirings having the large film thickness are formed by using the photosensitive paste, an edge curl is caused in an edge portion of the wiring pattern due to a shortage of an exposure amount upon exposing or a volume contraction upon baking. Such a state is shown in FIGS. 9A to 9D. In the diagrams, reference numeral 91 denotes a substrate; 92 a photosensitive paste; 93 a mask; 94 an exposing unit; and 95 a wiring pattern after the baking. As shown in FIGS. 9A to 9D, a thick film of the negative type photosensitive paste 92 is formed on the whole surface of the insulative substrate 91 (FIG. 9A), exposed through the mask 93 (FIG. 9B), and developed and the exposing unit 94 is left (FIG. 9C), the exposing unit 94 is baked, and the wiring pattern 95 (FIG. 9D) is obtained.
As shown in FIG. 9D, when the insulative layer is stacked so as to partially cover the wiring pattern 95 having the edge curl, the curl portion extending upward is pressed downward by an insulative layer forming material. In this instance, an air bubble is rolled into the substrate 91 side, so that a gap is formed in the insulative layer. In the insulative layer containing such a gap, insulation performance between the upper and lower wirings deteriorates and there is a fear that a short-circuiting is caused in accordance with circumstances. In the case of using those wirings as leading wirings from a display panel having airtight performance to the outside, the airtight performance of the display panel deteriorates.
As a method of solving such a problem of the edge curl, in JP-A-2003-133689, there has been disclosed a method whereby a film of a photosensitive paste is formed as a wiring pattern and patterned, thereafter, a film of a photosensitive paste serving as an insulative layer is formed and patterned before baking, and the wiring pattern and the insulative layer pattern are simultaneously baked.
According to the method disclosed in JP-A-2003-133689, since the wiring pattern and the insulative layer pattern are simultaneously baked, there is such an advantage that the occurrence of the edge curl of the wirings can be prevented and the number of baking steps can be reduced. Even by such a method, however, since there is a case where a void or a pin hole occurs in the insulative layer, further improvement is demanded in terms of a point that the insulation performance between the upper and lower wirings and the airtight performance are maintained.